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July 3, 2020
Reactis:
Simulink and Stateflow
Support
Conditional Input Branch Execution
Optimizing the block execution order.
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A number of factors influence whether or not a Simulink block executes during a given simulation step. These include whether or not the block (or a subsystem containing the block) has a sample time and whether or not the block resides in a conditionally executed subsystem. Conditional input branch execution is an optimization supported by Simulink that offers an additional way to determine when blocks execute by disabling them in some cases. Beginning with V2006.3.5 (beta), Reactis also supports this feature.

To understand how conditional input branch execution works, consider the following simple model. When input c is greater than or equal to zero, the Switch block outputs relop1 and ignores relop2. Conversely, when c is less than zero, the Switch block outputs relop2 and ignores relop1. The basic idea behind conditional input branch execution is to not execute ignored blocks. Small model with switch block demonstrating conditional execution

This optimization does not change outputs computed by the model, but it might speed up execution since some blocks do not execute. In the case of Reactis, the optimization has in important impact on coverage tracking. Namely, coverage targets for a block should not be considered to be covered during a simulation step when that block is ignored due to conditional input branch execution. For example, in the above model, neither the true nor false branch of relop2 should be considered covered when c is greater than or equal to zero.

In addition to Switch blocks, conditional input branch execution also applies to Multiport Switch blocks and non-virtual subsystems. That is the non-control inports of Multiport Switches and the inports of non-virtual subsystems each serve as the root of an ignorable branch just as each non-control inport of a Switch blocks does. We call these inports ignorable inports.

In the simple example above, each ignorable branch consisted of a single block wired to an ignorable inport; however, in general, an entire group of blocks might be ignored. The set of blocks included in an ignorable branch is computed as follows. A block B is included in an ignorable branch IB if it meets each of the following conditions:

  • B is a direct-feedthrough block. Such blocks do not maintain a state, instead their output values can be computed as a function only of their inputs. Examples of direct-feedthrough blocks include Gain, Sum, Logical Operator, and Relational Operator blocks. Examples of blocks that are not direct-feedthrough blocks are Unit Delay, Constant, and Integrator blocks.
  • B's outports only feed into either:
    • the ignorable port at the root of IB; or
    • the inports of blocks in IB.
  • B has the same underlying execution schedule as the block containing the ignorable inport at the root of IB. Two blocks have the same underlying execution schedule if:
    • both are triggered by same trigger; and
    • both are enabled by same enable port; and
    • both have the same sample time (possibly inherited)

In Simulink, a model is configured to use conditional branch execution in two ways.

  • For Switch and Multiport Switch blocks in the Simulation Parameters dialog.
    1. Load your model in Simulink.
    2. Select "Simulation -> Configuration Parameters..." menu item.
    3. Click the "Optimization" tab.
    4. Check the box for "Conditional input branch execution"

Simulation parameters dialog for configuring conditional input branch execution.

  • For non-virtual subsystems on a subsystem-by-subsystem basis.
    1. Load your model in Simulink.
    2. Right-click on a non-virtual subsystem and select "Subsystem parameters..."
    3. Check the box for "Propagate execution context across subsystem boundary"

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